SPC6332
N & P Pair Enhancement Mode MOSFET
DESCRIPTION
The SPC6332 is the N- and P-Channel enhancement
mode power field effect transistors are produced using
high cell density , DMOS trench technology. This high
density process is especially tailored to minimize on-state
resistance and provide superior switching performance.
These devices are particularly suited for low voltage
applications such as notebook computer power
management and other battery powered circuits where
high-side switching , low in-line power loss, and
resistance to transients are needed.
APPLICATIONS
Power Management in Note book
Portable Equipment
Battery Powered System
DC/DC Converter
Load Switch
DSC
LCD Display inverter
FEATURES
N-Channel
20V/0.95A,R
DS(ON)
=380mΩ@V
GS
=4.5V
20V/0.75A,R
DS(ON)
=450mΩ@V
GS
=2.5V
20V/0.65A,R
DS(ON)
=800mΩ@V
GS
=1.8V
P-Channel
-20V/1.0A,R
DS(ON)
= 520mΩ@V
GS
=-4.5V
-20V/0.8A,R
DS(ON)
= 700mΩ@V
GS
=-2.5V
-20V/0.7A,R
DS(ON)
= 950mΩ@V
GS
=-1.8V
Super high density cell design for extremely low
RDS (ON)
Exceptional on-resistance and maximum DC
current capability
SOT-363 (SC-70-6L) package design
PIN CONFIGURATION( SOT-363 / SC-70-6L)
PART MARKING
2011/04/07
Ver.2
Page 1
SPC6332
N & P Pair Enhancement Mode MOSFET
PIN DESCRIPTION
Pin
1
2
3
4
5
6
Symbol
S1
G1
D2
S2
G2
D1
Description
Source 1
Gate 1
Drain 2
Source 2
Gate 2
Drain1
ORDERING INFORMATION
Part Number
SPC6332S36RG
SPC6332S36RGB
Package
SOT-363
SOT-363
Part
Marking
32YW
32YW
※
Week Code : A ~ Z( 1 ~ 26 ) ; a ~ z( 27 ~ 52 )
※
SPC6332S36RG : Tape Reel ; Pb – Free
※
SPC6332S36RGB : Tape Reel ; Pb – Free ; Halogen -Free
ABSOULTE MAXIMUM RATINGS
(T
A
=25
℃
Unless otherwise noted)
Typical
Parameter
Drain-Source Voltage
Gate –Source Voltage
Continuous Drain Current(T
J
=150
℃
)
Pulsed Drain Current
Continuous Source Current(Diode Conduction)
Power Dissipation
Operating Junction Temperature
Storage Temperature Range
Thermal Resistance-Junction to Ambient
T
≤
10sec
Steady State
T
A
=25℃
T
A
=70℃
T
A
=25℃
T
A
=80℃
Symbol
N-Channel
V
DSS
V
GSS
I
D
I
DM
I
S
P
D
T
J
T
STG
R
θJA
P-Channel
Unit
20
±12
1.2
0.9
4
0.6
0.3
0.19
-55/150
-55/150
360
400
-20
±12
-1.0
-0.7
-3
-0.6
V
V
A
A
A
W
℃
℃
360
400
℃/W
2011/04/07
Ver.2
Page 2
SPC6332
N & P Pair Enhancement Mode MOSFET
ELECTRICAL CHARACTERISTICS
(T
A
=25
℃
Unless otherwise noted)
Parameter
Static
Drain-Source Breakdown
Voltage
Gate Threshold Voltage
Gate Leakage Current
Zero Gate Voltage Drain
Current
On-State Drain Current
Symbol
Conditions
V
GS
=0V,I
D
= 250uA
V
GS
=0V,I
D
=-250uA
V
DS
=V
GS
,I
D
=250uA
V
DS
=V
GS
,I
D
=-250uA
V
DS
=0V,V
GS
=±12V
V
DS
=0V,V
GS
=±12V
V
DS
= 20V,V
GS
=0V
V
DS
=-20V,V
GS
=0V
V
DS
= 20V,V
GS
=0V T
J
=55℃
V
DS
=-20V,V
GS
=0V T
J
=55℃
V
DS
≥
4.5V,V
GS
=5V
V
DS
≤
-4.5V,V
GS
=-5V
V
GS
=4.5V,I
D
=0.95A
V
GS
=-4.5V,I
D
=-1.0A
V
GS
=2.5V,I
D
=0.75A
V
GS
=-2.5V,I
D
=-0.8A
V
GS
=1.8V,I
D
=0.65A
V
GS
=-1.8V,I
D
=-0.5A
V
DS
=10V,I
D
=1.2A
V
DS
=-10V,I
D
=-1.0A
I
S
=0.5A,V
GS
=0V
I
S
=-0.5A,V
GS
=0V
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
Min.
20
-20
0.35
-0.35
Typ
Max. Unit
V
(BR)DSS
V
GS(th)
I
GSS
I
DSS
I
D(on)
1.0
-1.0
100
-100
1
-1
5
-5
0.26
0.42
0.32
0.58
0.42
0.75
2.6
1.5
0.8
-0.8
1.2
1.1
0.2
0.3
0.3
0.2
15
18
20
25
25
20
12
12
0.38
0.52
0.45
0.70
0.80
0.95
1.2
-1.2
2.0
1.8
V
nA
uA
A
2
-2
Drain-Source On-Resistance R
DS(on)
Ω
Forward Transconductance
Diode Forward Voltage
Dynamic
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
gfs
V
SD
S
V
Q
g
Q
gs
Q
gd
t
d(on)
N-Channel
V
DS
=10V,V
GS
=4.5V, I
D
≡1.2A
P-Channel
V
DS
=-10V,V
GS
=-4.5V ,I
D
≡-1.0A
nC
Turn-On Time
t
r
t
d(off)
Turn-Off Time
t
f
N-Channel
V
DD
=10V,R
L
=20Ω ,I
D
≡0.5A
V
GEN
=4.5V ,R
G
=6Ω
P-Channel
V
DD
=-10V,R
L
=20Ω ,I
D
≡-0.5A
V
GEN
=-4.5V ,R
G
=6Ω
25
30
30
40
40
30
20
20
nS
2011/04/07
Ver.2
Page 3
SPC6332
N & P Pair Enhancement Mode MOSFET
TYPICAL CHARACTERISTICS ( N-Channel )
2011/04/07
Ver.2
Page 4
SPC6332
N & P Pair Enhancement Mode MOSFET
TYPICAL CHARACTERISTICS ( N-Channel )
2011/04/07
Ver.2
Page 5
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